The semiconductor integrated circuit (IC) industry has experienced rapid growth. Technological advances in IC materials and design have produced generations of ICs having smaller and higher performing circuits than previous generations. One such advancement is the recognition of materials having higher hole mobility than that of silicon. Therefore, there is a desire to replace silicon as the p-channel material for future CMOS generations (e.g., technology nodes).
This desire to have a high mobility p-channel material must be balanced with the need and/or desire to maintain silicon substrates as a fabrication vehicle. Furthermore, silicon-based peripheral circuitry such as, I/O and ESD devices, are often desired. However, due to the lattice mismatch of the higher hole mobility p-channel material and silicon, integrating the materials can be challenging.
Thus, what is desired is a device and method of forming thereof that includes a low-defect, high hole mobility material disposed on a substrate (e.g., silicon wafer).